1. Field of the Invention
The present invention relates to a method for fabricating a non-volatile memory device that is used in high-speed and low power consumption device, more particularly to a method for fabricating a non-volatile memory device using nano-crystal dots with an increased in etching rate and an increased oxidation rate at the grain boundary.
2. Description of the Conventional Art
As shown in FIGS. 1A through 1F, conventional methods use incubation time to fabricate nano-crystal in fabricating poly-silicon. FIG. 1A shows a process in which poly-silicon is incubated in short amount of time on a tunneling dielectric 104 fabricated on a silicon substrate and thereby nano-crystals 106 are fabricated. FIG. 1B shows a process in which an interlayer dielectric 108 is fabricated on the nano-crystals 106. FIG. 1C shows a process in which a control gate 110 is etched after a poly-silicon film for the control gate 110 is attached to the interlayer dielectric 108.
FIG. 1D shows a process in which complete gate etching is performed with the control gate 110 used as a self-mask. FIG. 1E shows a process in which an oxide film 112 is fabricated by low press chemical vapor deposition (LPCVD) for insulation between the control gate 110 and a metal interconnect layer to be formed in a subsequent process. FIG. 1F shows a process in which a contact hole is implemented in the tunneling dielectric 104 that becomes a drain 116 and the oxide film 112 and then a metal interconnect layer 114 is sputtered on the contact hole and etching for patterning is performed.
In conventional methods, because the nano-crystals are fabricated within a very short incubation time in a poly-silicon deposition process, there are several drawbacks such that the process control is difficult, the size of nano-crystal dots is not uniform, and reproducibility is low.